Data Fields

SPDINFO::SPECIFICINFO::DDR2SDRAMINFO::EPPInfo::PROFILEINFO::FULLPROFILEINFO Struct Reference

#include <SysInfo.h>

Data Fields

bool enabled
 TRUE if this profile contains valid data.
wchar_t voltageLevel [SHORT_STRING_LEN]
 Voltage level required for this profile.
float clkspeed
 Clock speed in MHz.
int cmdRate
 Address command rate. 1T - commands can be sent on every clock edge. 2T - commands can be sent on every other clock edge.
wchar_t addrDriveStrength [VSHORT_STRING_LEN]
 Address Drive Strength.
wchar_t CSDriveStrength [VSHORT_STRING_LEN]
 Chip Select Drive Strength.
wchar_t clockDriveStrength [VSHORT_STRING_LEN]
 Clock Drive Strength.
wchar_t dataDriveStrength [VSHORT_STRING_LEN]
 Data Drive Strength.
wchar_t DQSDriveStrength [VSHORT_STRING_LEN]
 DQS Drive Strength.
wchar_t addrCmdFineDelay [VSHORT_STRING_LEN]
 Address/Command Fine Delay.
wchar_t addrCmdSetupTime [VSHORT_STRING_LEN]
 Address/Command Setup Time.
wchar_t CSFineDelay [VSHORT_STRING_LEN]
 Chip Select Fine Delay.
wchar_t CSSetupTime [VSHORT_STRING_LEN]
 Chip Select Setup Time.
int CASSupported
 CAS latency supported.
float tCK
 Minimum clock cycle time in ns.
float tRCD
 Minimum RAS to CAS delay in ns.
float tRP
 Minimum Row Precharge time in ns.
float tRAS
 Minimum Active to Precharge Time in ns.
float tWR
 Write recovery time in ns.
float tRC
 Minimum Auto-Refresh to Active/Auto-Refresh Time in ns.

Field Documentation

bool enabled

TRUE if this profile contains valid data.

wchar_t voltageLevel[SHORT_STRING_LEN]

Voltage level required for this profile.

float clkspeed

Clock speed in MHz.

int cmdRate

Address command rate. 1T - commands can be sent on every clock edge. 2T - commands can be sent on every other clock edge.

wchar_t addrDriveStrength[VSHORT_STRING_LEN]

Address Drive Strength.

wchar_t CSDriveStrength[VSHORT_STRING_LEN]

Chip Select Drive Strength.

wchar_t clockDriveStrength[VSHORT_STRING_LEN]

Clock Drive Strength.

wchar_t dataDriveStrength[VSHORT_STRING_LEN]

Data Drive Strength.

wchar_t DQSDriveStrength[VSHORT_STRING_LEN]

DQS Drive Strength.

wchar_t addrCmdFineDelay[VSHORT_STRING_LEN]

Address/Command Fine Delay.

wchar_t addrCmdSetupTime[VSHORT_STRING_LEN]

Address/Command Setup Time.

wchar_t CSFineDelay[VSHORT_STRING_LEN]

Chip Select Fine Delay.

wchar_t CSSetupTime[VSHORT_STRING_LEN]

Chip Select Setup Time.

CAS latency supported.

float tCK

Minimum clock cycle time in ns.

float tRCD

Minimum RAS to CAS delay in ns.

float tRP

Minimum Row Precharge time in ns.

float tRAS

Minimum Active to Precharge Time in ns.

float tWR

Write recovery time in ns.

float tRC

Minimum Auto-Refresh to Active/Auto-Refresh Time in ns.


The documentation for this struct was generated from the following file:
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